1. Field of the Invention
The present invention relates to dielectric materials, their use in integrated circuit fabrication, and a method for forming a dielectric material.
2. Description of the Background Art
Integrated circuits have evolved into complex devices that can include millions of components (e. g., transistors, capacitors and resistors) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. The demands for greater circuit density necessitate a reduction in the dimensions of the integrated circuit components.
As the dimensions of the integrated circuit components are reduced (e. g., sub-micron dimensions), the materials used to fabricate such components contribute to their electrical performance. For example, low resistivity metal interconnects (e. g., copper and aluminum) provide conductive paths between the components on integrated circuits. Typically, the metal interconnects are electrically isolated from each other by an insulating material. When the distance between adjacent metal interconnects and/or the thickness of the insulating material has sub-micron dimensions, capacitive coupling potentially occurs between such interconnects. Capacitive coupling between adjacent metal interconnects may cause cross talk and/or resistance-capacitance (RC) delay which degrades the overall performance of the integrated circuit. In order to prevent capacitive coupling between adjacent metal interconnects, low dielectric constant (low k) insulating materials (e. g., dielectric constants less than about 4.5) are needed.
Organosilicates have been suggested for use as an insulating material on integrated circuits, since some organosilicates have low dielectric constants. However, organosilicates can absorb water, due to their hydrogen content, which makes them unsuitable as a moisture barrier for integrated circuits. Additionally, organosilicates suffer from etch compatibility and porosity as compared to standard oxide films such as, for example, undoped silicon oxides and fluorosilicate glass (FSG).
Therefore, a need exists in the art for low dielectric constant materials, which are also good moisture barriers for integrated circuits.
In one embodiment, a method for forming a fluoro-organosilicate layer for use in integrated circuit fabrication is provided. In one aspect, the fluoro-organosilicate layer is formed by applying an electric field to a gas mixture comprising a fluoro-organosilane compound and an oxidizing gas. The gas mixture is introduced into a process chamber where the application of the electric field thereto, in close proximity to a substrate surface, results in the formation of the fluoro-organosilicate layer on the substrate surface.
An as-deposited fluoro-organosilicate layer has a dielectric constant that is less than about 3.5, making it suitable for use as an insulating material on integrated circuits. The dielectric constant of the fluoro-organosilicate layer is tunable, in that it can be varied in the desired range as a function of the reaction temperature and composition of the gas mixture during layer formation. Also, the fluorine content of the fluoro-organosilicate layer reduces the water absorption capability thereof, making such fluoro-organosilicate layers suitable as moisture barriers for integrated circuits.
The fluoro-organosilicate layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the fluoro-organosilicate layer is used as a hardmask. For such an embodiment, a preferred process sequence includes depositing a fluoro-organosilicate layer on a substrate. After the fluoro-organosilicate layer is deposited on the substrate, a pattern is defined therein. Thereafter, the pattern is transferred into the substrate using the fluoro-organosilicate layer as a hardmask.
In another integrated circuit fabrication process, the fluoro-organosilicate layer is incorporated into a damascene structure. For such an embodiment, a preferred process sequence includes depositing a first dielectric layer on a substrate. A fluoro-organosilicate layer is then formed on the first dielectric layer. Thereafter, the fluoro-organosilicate layer is patterned and etched to define contacts/vias therethrough. After the fluoro-organosilicate layer is patterned and etched, a second dielectric layer is deposited thereover. The second dielectric layer is then patterned and etched to define interconnects therethrough. The interconnects formed in the second dielectric layer are positioned over the contacts/vias formed in the fluoro-organosilicate layer. After the interconnects are formed the contacts/vias defined in the fluoro-organosilicate layer are etched through the first dielectric layer to the substrate surface. Thereafter, the damascene structure is completed by filling the interconnects and contacts/vias with a conductive material.